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 19-2105; Rev 0; 7/01
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier
General Description
The MAX3271 transimpedance amplifier provides a compact low-power solution for 2.5Gbps communications. It features 495nA input-referred noise, 2GHz bandwidth, and 2mA AC input overload. The MAX3271 is a compact 30mil x 50mil die and requires no external compensation capacitor. It operates from a single +3.3V supply and consumes 83mW. A space-saving filter connection is provided for positive bias to the photodiode through a 750 resistor to VCC. These features allow easy assembly into a TO-46 or TO-56 header with a photodiode. The MAX3271 has a typical optical dynamic range of -21dBm to +3dBm in a shortwave configuration or -24dBm to 0dBm in a longwave configuration. The MAX3271 and MAX3272* provide a two-chip solution for Gigabit Ethernet and Fibre Channel receiver applications. o Single +3.3V Power Supply o 83mW Power Consumption o 495nA Input-Referred-Noise o 2GHz Bandwidth o 2mA AC Input Overload o 30mil x 50mil Die Size
Features
MAX3271
Applications
Gigabit Ethernet Optical Receivers Fibre Channel Optical Receivers System Interconnects 2.5Gbps Optical Receivers SONET/SDH Receivers
PART MAX3271E/D MAX3271E/W
Ordering Information
TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE Dice** Wafer**
**Dice/wafers are designed to operate from -40C to +85C, but
are tested and guaranteed only at TA = +25C.
Typical Application Circuit
+3.3V
0.1F
VCC 750 CFILTER 470pF FILTER PHOTODIODE IN TIA OUT0.1F OUT+ 100
LIMITING AMPLIFIER
OUT+
0.1F
OUT-
GND
MAX3271
MAX3272*
*Future product ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier MAX3271
ABSOLUTE MAXIMUM RATINGS
Power-Supply Voltage (VCC) ................................-0.5V to +6.0V Input Current (IN) ..................................................-4mA to +4mA FILTER Current ..............................................-12mA to +12mA Voltage at OUT+, OUT- ..................(VCC - 1.5V) to (VCC + 0.5V) Operating Junction Temperature Range (TJ) ...........................-55C to +150C Storage Ambient Temperature Range (Tstg) ....-55C to +150C Die Attach Temperature ..................................................+400C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = -40C to +85C. Typical values are at VCC = +3.3V, source capacitance = 0.85pF, TA = +25C, unless otherwise noted.) (Notes 1, 2)
PARAMETER Input Bias Voltage Power-Supply Current Transimpedance Small-Signal Bandwidth Output Impedance Maximum Differential Output Swing Filter Resistor AC Input Overload DC Input Overload Input-Referred Noise Input-Referred Noise Density Low-Frequency Cutoff Transimpedance Linear Range Deterministic Jitter Power-Supply Noise Rejection DJ PSNR IN (Note 3) (Note 3) (Note 3) (Note 4) -3dB, input 20A DC 0.95 linearity 1.05 (Note 3) (Notes 3, 5) 10Ap-p input 20Ap-p input 2mAp-p 40 18 12 36 40 30 psp-p dB 2.0 1.0 495 11 50 655 BW ICC 40Ap-p input, differential out (Note 3) Single-ended Input = 1mAp-p 2.1 1.5 42 185 SYMBOL CONDITIONS MIN 0.66 TYP 0.83 25 2.8 2 50 300 750 58 430 MAX 1.1 35 3.4 UNITS V mA k GHz mVp-p mAp-p mA nARMS pA/Hz kHz Ap-p
VCC = 100mVp-p, f < 2MHz (Note 6)
Note 1: Production test at room ambient temperature only. Die parameters are guaranteed by design and characterization at -40C and +85C. Note 2: Source capacitance represents the total capacitance at the IN pad during characterization of the noise and bandwidth parameters. Note 3: Guaranteed by design and characterization. Note 4: Input-referred noise density is IN/BW. No external filters are used for the noise measurements. Note 5: Deterministic jitter is measured with a K28.5 pattern (0011 1110 1011 0000 0101). Note 6: Power-supply noise rejection PSNR = -20log(VOUT/VCC), where VOUT is the differential output voltage and VCC is the noise on VCC.
2
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+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier
Typical Operating Characteristics
(VCC = +3.3V, CIN = 0.85pF, TA = +25C, unless otherwise noted.)
MAX3271
INPUT-REFERRED NOISE vs. TEMPERATURE
MAX3271 toc01
FREQUENCY RESPONSE
MAX3271 toc02
DETERMINISTIC JITTER vs. INPUT AMPLITUDE
45 DETERMINISTIC JITTER (psp-p) 40 35 30 25 20 15 10 5 K28.5 DATA STREAM re = 6dB
MAX3271 toc03
750 INPUT-REFERRED NOISE (nARMS) 700 650 600 550 500 450 400 350 -50 -25 0 25 50 75 CIN = 0.85pF CIN = 0.5pF CIN IS SOURCE CAPACITANCE PRESENTED TO DIE, INCLUDING PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE
70 65 TRANSIMPEDANCE (dB) 60 55 50 45 40
50
0 10M 100M 1G 10G 0.01 0.1 1 10 FREQUENCY (Hz) INPUT AMPLITUDE (mAp-p)
100
JUNCTION TEMPERATURE (C)
SMALL-SIGNAL TRANSIMPEDANCE vs. TEMPERATURE
MAX3271 toc04
BANDWIDTH vs. TEMPERATURE
MAX3271 toc05
EYE DIAGRAM (INPUT = 20Ap-p)
MAX3271 toc06
70 69 TRANSMIPEDANCE (dB) 68 67 66 65 64 63 62 61 60 -50 -25 0 25 50 75
2500 2400 2300 BANDWIDTH (MHz) 2200 2100 2000 1900 1800 1700 1600 1500 CIN = 1.5pF CIN = 1.0pF CIN = 0.5pF
9.5mV/div
INPUT: 213 -1 PRBS -50 -25 0 25 50 75 100 57ps/div JUNCTION TEMPERATURE (C)
100
JUNCTION TEMPERATURE (C)
EYE DIAGRAM (INPUT = 2mAp-p)
MAX3271 toc07
150 OUPUT VOLTAGE (mVp-p) 100 50 0 -50 -100 -150
53mV/div
INPUT: 213 -1 PRBS 57ps/div
-200 -200 -150 -100 -50 0 50 100 150 200 INPUT CURRENT (A)
_______________________________________________________________________________________
MAX3271 toc08
200
DC TRANSFER FUNCTION (VFILT = 0V)
3
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier MAX3271
Typical Operating Characteristics (continued)
(VCC = +3.3V, CIN = 0.85pF, TA = +25C, unless otherwise noted.)
DIFFERENTIAL OUTPUT REFLECTION COEFFICIENT
MAX3271 toc09
OUTPUT AMPLITUDE vs. TEMPERATURE (INPUT = 1mAp-p)
350 AMPLITUDE (mVp-p) 300 250 200 150 100 50 0
MAX3271 toc10
0 -5 -10 S22 (dB) -15 -20 -25 -30 -35 0 500 1000 1500 2000 2500
400
3000
-50
-25
0
25
50
75
100
FREQUENCY (MHz)
JUNCTION TEMPERATURE (C)
Pin Description
BOND PAD 1 2 3 4, 5 6, 9 7 8 NAME FILTER N.C. IN VCC GND OUT+ OUTFUNCTION Provides bias voltage for the photodiode through a 750 resistor to VCC. When grounded, this pin disables the DC-cancellation amplifier to allow a DC path from IN to OUT+ and OUT- for testing. No Connection. Leave unconnected. TIA Input Power Supply. Both pads must be connected to supply. Bond pad 4 supplies power to the transimpedance stage. Bond pad 5 supplies power to the remaining circuitry. Ground. Both pads must be connected to ground. Bond pad 9 is ground for the transimpedance stage. Bond pad 6 is ground for the remaining circuitry. Noninverted Data Output. Current flowing into IN causes VOUT+ to increase. Inverted Data Output. Current flowing into IN causes VOUT- to decrease.
4
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier
Detailed Description
The MAX3271 is a transimpedance amplifier designed for 2.5Gbps fiber optic applications. A functional diagram of the MAX3271 is shown in Figure 1. The MAX3271 is comprised of a transimpedance amplifier stage, a voltage amplifier stage, an output buffer, and a direct current feedback cancellation circuit.
Output Buffer
The output buffer provides a reverse-terminated voltage output. The buffer is designed to drive a 100 differential load between OUT+ and OUT-. The output current is divided between internal 50 resistors and the external load resistor. In the Typical Applications Circuit, this creates a voltage-divider with gain of 1/2 for a 100 differential load. The MAX3271 can also be terminated with higher output impedances, which increases gain and output voltage swing but lowers bandwidth. For optimum supply-noise rejection, the MAX3271 should be terminated with a differential load. If a singleended output is required, the unused output should be similarly terminated. The MAX3271 will not drive a DCcoupled 50 grounded load.
MAX3271
Transimpedance Amplifier Stage
The signal current at the input flows into the summing node of a high-gain amplifier. Shunt feedback through the resistor RF converts this current to a voltage. In parallel with the feedback are two back-to-back Schottky diodes that clamp the output signal for large input currents as shown in Figure 2.
Voltage Amplifier Stage
The voltage amplifier stage provides gain and converts the single-ended input to differential outputs.
MAX3271
RF TRANSIMPEDANCE AMPLIFIER IN 50 VOLTAGE AMPLIFIER OUTPUT BUFFER
50 OUT+ OUT-
LOWPASS FILTER VCC DISABLE 750 FILTER DC CANCELLATION CIRCUIT
VCC GND
Figure 1. Functional Diagram
_______________________________________________________________________________________
5
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier MAX3271
DC Cancellation Circuit
The direct current (DC) cancellation circuit uses lowfrequency feedback to remove the DC component of the input signal. This feature centers the input signal within the transimpedance amplifier's linear range, thereby reducing pulse-width distortion caused by large input signals (Figure 3). The DC cancellation circuit is internally compensated and therefore does not require external capacitors. This circuit minimizes pulse-width distortion for data sequences that exhibit a 50% mark density. A mark density significantly different from 50% will cause the MAX3271 to generate pulse-width distortion. DC cancellation current is drawn from the input and creates noise. For low-level signals with little or no DC component, this is not a problem. Amplifier noise will increase slightly for signals with significant DC component.
Applications Information
Optical Power Relations
Many of the MAX3271 specifications relate to the input signal amplitude. When working with fiber optic receivers, the input is sometimes expressed in terms of average optical power and extinction ratio. Figure 4 shows relations that are helpful for converting optical power to input signal when designing with the MAX3271. Optical power relations are shown in Table 1; the definitions are true if the average duty cycle of the input data is 50%.
Optical Sensitivity Calculation
The input-referred RMS noise current (I N ) of the MAX3271 generally determines the receiver sensitivity. To obtain a system bit error rate (BER) of 1E-12, the SNR ratio must always exceed 14.1. The input sensitivity, expressed in average power, can be estimated as: 14.1 IN (re + 1) Sensitivity = 10log 1000 dBm 2(re - 1)
AMPLITUDE
where is the photodiode responsivity in A/W.
Input Optical Overload
The overload is the largest input that the MAX3271 accepts while meeting specifications. The optical overload can be estimated in terms of average power with the following equation: 2mA Overload = 10 log 1000 dBm 2
TIME OUTPUT (SMALL SIGNALS) OUTPUT (LARGE SIGNALS)
Figure 2. MAX3271 Limited Output
P1 AMPLITUDE INPUT FROM PHOTODIODE
OPTICAL POWER
PAVG
TIME INPUT AFTER DC CANCELLATION
P0
TIME
Figure 3. DC Cancellation Effect on Input
Figure 4. Optical Power Relations
6
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier MAX3271
Table 1. Optical Power Relations
PARAMETER Average Power Extinction Ratio Optical Power of a 1 Optical Power of a 0 Signal Amplitude SYMBOL PAVG re P1 P0 RELATION PAVG = (P0 + P1) / 2 re = P1/P0 P1 = 2PAVG (re) / (re + 1) P0 = 2PAVG / (re + 1)
OUTOUT+ CFILTER VCC
PHOTODIODE
TOP VIEW OF TO-56 HEADER
PIN
PIN = P1 - P0 = 2PAVG (re - 1) / (re + 1)
Optical Linear Range
The MAX3271 has high gain, which limits the output when the input signal exceeds 40Ap-p. The MAX3271 operates in a linear range for inputs not exceeding: 40A(re + 1) Linear Range = 10log 1000 dBm 2(re - 1)
MAX3271 CASE IS GROUND
Figure 5. Suggested Layout for TO-56 Header
noise is (assuming the filter capacitor is much larger than the photodiode capacitance): INOISE = (VNOISE)(CPD) / (RFILTER)(CFILTER) If the amount of tolerable noise is known, the filter capacitor can be easily selected: CFILTER = (VNOISE)(CPD) / (RFILTER)(INOISE) For example, with maximum noise voltage = 100mVp-p, CPD = 0.85pF, RFILTER = 750, and INOISE selected to be 250nA (1/2 of the MAX3271's input noise): CFILTER = (100mV)(0.85pF) / (750)(250nA) = 450pF
Layout Considerations
Noise performance and bandwidth will be adversely affected by capacitance at the IN pin. Minimize capacitance on this pin and select a low-capacitance photodiode. Assembling the MAX3271 in die form using chip and wire technology provides the best possible performance. Figure 5 shows a suggested layout for a TO header.
Photodiode Filter
Supply voltage noise at the cathode of the photodiode produces a current I = CPD V/t, which reduces the receiver sensitivity (C PD is the photodiode capacitance.) The filter resistor of the MAX3271, combined with an external capacitor, can be used to reduce this noise (see the Typical Application Circuit). Current generated by supply noise voltage is divided between CFILTER and CPD. The input noise current due to supply
Wire Bonding
For high-current density and reliable operation, the MAX3271 uses gold metalization. Connections to the die should be made with gold wire only, using ballbonding techniques. Wedge bonding is not recommended. Die thickness is typically 15mils (0.375mm).
_______________________________________________________________________________________
7
+3.3V, 2.5Gbps Low-Power Transimpedance Amplifier MAX3271
Chip Topography
V CC (PAD 5) GND (PAD 6)
V CC (PAD 4)
OUT+ (PAD 7)
IN (PAD 3) 0.030" (0.76mm) N.C. (PAD 2)
FILTER (PAD 1)
OUT(PAD 8)
GND (PAD 9) 0.050" (1.27mm)
Pad Coordinates
PAD# 1 2 3 4 5 6 7 8 9 COORDINATES (MILS) 47, 47 47, 197 47, 346 44, 507 222, 505 374, 505 1006, 505 1006, 89 226, 47
TRANSISTOR COUNT: 340 SUBSTRATE: ELECTRICALLY ISOLATED PROCESS: SiGe BIPOLAR
Coordinates are for the center of the pad. Coordinate 0, 0 is the lower left corner of the passivation opening for pad 1.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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